1. Field of the Invention
The present invention relates to a print mask for screen printing used for printing a printing paste onto a wafer so as to form bumps or protrusion electrodes on barrier metal layers provided on the wafer. The present invention includes a method of electronic components by using the print mask, and relates particularly to a method of manufacturing a flip-chip integrated circuit that is mounted on a circuit board by face-down bonding.
2. Description of the Related Art
Conventional assembling integrated circuits includes face-down bonding method that mounts the integrated circuits on the top surface of a circuit board having a circuit pattern so that circuits forming surface of the integrated circuit face the surface of the circuit board, and connects the integrated circuits and the circuit board by means of leads.
Integrated circuits that are mounted by face-down bonding are called the flip-chip integrated circuit, of which terminals have generally been connected to the circuit pattern of the circuit board by means of solder or an electrically conductive adhesive.
One of the conventional flip-chip integrated circuits has such a constitution as a plurality of barrier metal layers made of nickel or the like are formed as pad electrodes on one of the principal planes of a semiconductor wafer, and electrodes consisting of solder bumps are selectively formed on the barrier metal layers. Assembling of this flip-chip integrated circuit on a circuit board is carried out by positioning the solder bumps of the flip-chip integrated circuit on the pad electrodes so as to oppose the corresponding circuit pattern provided on the circuit board, mounting the flip-chip integrated circuit on the circuit board and heating the solder bumps to a high temperature so as to melt, thereby soldering the barrier metal layers of the flip-chip integrated circuit onto the circuit pattern provided on the circuit board.
Such a flip-chip integrated circuit is usually manufactured in a process as described below (refer to FIG. 4 through FIG. 6).    (1) A semiconductor wafer 11 is prepared so that a plurality of barrier metal layers 13 are disposed in linear arrangement on the integrated circuit forming surface of the semiconductor wafer, circuit pattern lines 12 are provided between adjacent barrier metal layers 13, and covering the circuit pattern lines 12 with passivation layer 14. The circuit pattern lines 12 function as power feeder wires that supply electric power and electrical signals to the semiconductor elements formed on the semiconductor wafer 11, and are usually formed from a metallic material such as aluminum in a pattern line perpendicular to the direction of arranging the barrier metal layers 13.    (2) A print mask 16 is prepared, the print mask having a plurality of elongated perforations 17, which are larger than the outer diameter of the barrier metal layers, formed in one-to-one correspondence to the barrier metal layers 13.    (3) The print mask 16 is placed on or above the semiconductor wafer 11, so that the perforations 17 are positioned on or above the barrier metal layers 13.    (4) A solder paste 15 is supplied onto the print mask 16, a squeegee is pressed against the print mask 16 to move the solder paste in a predetermined direction, so as to print the solder paste 15 via the perforations 17 onto the barrier metal layers 13.    (5) The semiconductor wafer is heated so as to melt the solder paste 15 that has been applied, thereby to form spherical solder bumps on the barrier metal layers 13. By dicing the semiconductor wafer 11 into chips of predetermined shape, a number of flip-chip integrated circuits are completed.
The elongated perforations 17 are disposed in linear arrangement in the print mask 16, while the edges of the perforations 17 along longitudinal direction thereof are disposed perpendicular to the direction of the row of perforations 17. This means that, when the print mask 16 is placed on or above the semiconductor wafer 11, the edges of the perforations 17 are disposed substantially in parallel to the circuit pattern lines provided between the adjacent barrier metal layers 13 (refer to FIG. 4).
It has been known to form a plurality of rows of perforations 17a, 17b, 17c by disposing a number of perforation 17 in linear arrangement on a mask sheet 8 that is made of stainless steel or the like as shown in FIG. 10, so as to form solder bumps for flip-chip ICs by using the mask for screen printing. In this example, the perforation 17 that constitute three rows of perforations 17a, 17b, 17c are disposed with a density which is predetermined for each row of the perforations in correspondence to the barrier metal layers provided on the silicon substrate, while the opening area is made substantially equal among the rows of perforations 17a, 17b, 17c. 
The circuit pattern lines 12 provided between the adjacent barrier metal layers 13 on the semiconductor wafer 11 have predetermined thickness (for example, 0.5 to 1.5 μm), and the passivation layer 14 that covers the circuit pattern lines 12 is provided with protrusions 14a or steps formed on the surface thereof so as to protrude in a configuration corresponding to the thickness and profile of the circuit pattern lines 12. When the print mask 16 is placed on or above the semiconductor wafer 11 having such protrusions 14a, the edges of the perforations along longitudinal direction thereof are often positioned on corners located at the bases of the protrusions 14a of the passivation layer 14. Squeezing the print mask 16 so as to press against the semiconductor wafer 11 under this conditions causes the edges of the perforations 17 to collide against into the corner, resulting in damage on the surface of the passivation layer 14 (refer to FIG. 5, FIG. 6). This gives rise to the possibility of degrading the sealing performance of the passivation layer 14, which leads to corrosion of the circuit pattern lines 12 due to moisture in the atmosphere or other causes. This problem has been conspicuous in such a case as the edges of the perforations 17 along longitudinal direction thereof is straight.
In a print mask of the configuration shown in FIG. 10, when solder paste placed on the mask is moved by a squeegee over a certain distance, the solder paste located on the mask in the vicinity of the row of perforations 17a having a high density of arrangement of the perforations 17 experiences flow-out onto the barrier metal layers a larger number of times than the solder paste located on the mask in the vicinity of the rows of perforations 17b and 17c where the density of perforations is lower than that of the row of perforations 17a. Such a frequent flow-out of the solder paste causes vigorous rotation and flow of the solder paste itself on the mask, which tend to make the viscosity of the solder paste located in the vicinity of the row of perforations 17a lower than that of the solder paste located in the vicinity of other rows of perforations.
As a result, there has been such a problem that the quantity of solder paste 50 applied onto the barrier metal layers tends to be larger in the row of perforations 17a than in the rows of perforations 17b and 17c, thus generating variations in the size of the solder bumps. The side variations of the solder bumps results in a decrease in the strength of boarding the flip-chip ICs on the circuit board due to tilting of those ICs when mounting the those ICs on the circuit board.